The present invention relates to a process for producing a semiconductor integrated circuit device. More particularly, the present invention pertains to a technique which may effectively be applied to writing of data into memory cells in a mask-programmed ROM (Read Only Memory).
In mask-programmed ROM's, each memory cell is generally formed using a MISFET, and writing of data into this memory cell is effected by controlling the threshold voltage of the MISFET.
As one type of such mask-programmed ROM, vertical ROM's are known (see, for example, the specification of Japanese Patent Laid-Open No. 30388/1977). In such a vertical ROM, memory cells which are constituted by MISFET's are provided at the intersections, respectively, between data and word lines. A plurality of such memory cells are connected in series to form a row of memory cells, and a plurality of such memory cell rows are arranged to form a memory cell array.